Regviz

Freescale Semiconductor /MKV56F22 /SIM /SOPT2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SOPT2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MKV56F22/SIM/SOPT2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)CLKOUTSEL 0 (00)FBSL 0 (0)TRACECLKSEL 0 (00)PLLFLLSEL 0 (0)RMIISRC 0 (00)TIMESRC

PLLFLLSEL=00, FBSL=00, RMIISRC=0, CLKOUTSEL=000, TIMESRC=00, TRACECLKSEL=0

Description

System Options Register 2

Fields

CLKOUTSEL

CLKOUT select

0 (000): FlexBus CLKOUT

2 (010): Flash clock

3 (011): LPO clock (1 kHz)

4 (100): MCGIRCLK

5 (101): OSCERCLK_UNDIV

6 (110): OSCERCLK
FBSL

FlexBus security level

0 (00): All off-chip accesses (instruction and data) via the FlexBus are disallowed.

1 (01): All off-chip accesses (instruction and data) via the FlexBus are disallowed.

2 (10): Off-chip instruction accesses are disallowed. Data accesses are allowed.

3 (11): Off-chip instruction accesses and data accesses are allowed.
TRACECLKSEL

Debug trace clock select

0 (0): MCGOUTCLK

1 (1): Core/system clock
PLLFLLSEL

PLL/FLL clock select

0 (00): MCGFLLCLK clock

1 (01): MCGPLLCLK clock
RMIISRC

RMII clock source select

0 (0): EXTAL clock

1 (1): External bypass clock (ENET_1588_CLKIN).
TIMESRC

IEEE 1588 timestamp clock source select

0 (00): Core/system clock

1 (01): MCGFLLCLK , or MCGPLLCLK as selected by SOPT2[PLLFLLSEL].

2 (10): OSCERCLK clock

3 (11): External bypass clock (ENET_1588_CLKIN)

Links

()

Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data